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Source file src/cmd/asm/internal/arch/mips.go

Documentation: cmd/asm/internal/arch

     1  // Copyright 2015 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  // This file encapsulates some of the odd characteristics of the
     6  // MIPS (MIPS64) instruction set, to minimize its interaction
     7  // with the core of the assembler.
     8  
     9  package arch
    10  
    11  import (
    12  	"cmd/internal/obj"
    13  	"cmd/internal/obj/mips"
    14  )
    15  
    16  func jumpMIPS(word string) bool {
    17  	switch word {
    18  	case "BEQ", "BFPF", "BFPT", "BGEZ", "BGEZAL", "BGTZ", "BLEZ", "BLTZ", "BLTZAL", "BNE", "JMP", "JAL", "CALL":
    19  		return true
    20  	}
    21  	return false
    22  }
    23  
    24  // IsMIPSCMP reports whether the op (as defined by an mips.A* constant) is
    25  // one of the CMP instructions that require special handling.
    26  func IsMIPSCMP(op obj.As) bool {
    27  	switch op {
    28  	case mips.ACMPEQF, mips.ACMPEQD, mips.ACMPGEF, mips.ACMPGED,
    29  		mips.ACMPGTF, mips.ACMPGTD:
    30  		return true
    31  	}
    32  	return false
    33  }
    34  
    35  // IsMIPSMUL reports whether the op (as defined by an mips.A* constant) is
    36  // one of the MUL/DIV/REM/MADD/MSUB instructions that require special handling.
    37  func IsMIPSMUL(op obj.As) bool {
    38  	switch op {
    39  	case mips.AMUL, mips.AMULU, mips.AMULV, mips.AMULVU,
    40  		mips.ADIV, mips.ADIVU, mips.ADIVV, mips.ADIVVU,
    41  		mips.AREM, mips.AREMU, mips.AREMV, mips.AREMVU,
    42  		mips.AMADD, mips.AMSUB:
    43  		return true
    44  	}
    45  	return false
    46  }
    47  
    48  func mipsRegisterNumber(name string, n int16) (int16, bool) {
    49  	switch name {
    50  	case "F":
    51  		if 0 <= n && n <= 31 {
    52  			return mips.REG_F0 + n, true
    53  		}
    54  	case "FCR":
    55  		if 0 <= n && n <= 31 {
    56  			return mips.REG_FCR0 + n, true
    57  		}
    58  	case "M":
    59  		if 0 <= n && n <= 31 {
    60  			return mips.REG_M0 + n, true
    61  		}
    62  	case "R":
    63  		if 0 <= n && n <= 31 {
    64  			return mips.REG_R0 + n, true
    65  		}
    66  	case "W":
    67  		if 0 <= n && n <= 31 {
    68  			return mips.REG_W0 + n, true
    69  		}
    70  	}
    71  	return 0, false
    72  }
    73  

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